1. Field of the Invention
The present invention relates to a color video signal processing circuit suitable for use in processing two chrominance component signals produced on the reproduction side of a video tape recorder (VTR), in which two chrominance component signals are time compressed and successively recorded in cyclically repeated fashion as one series of chrominance signals, and, on the reproduction side, such a signal is time expanded and made into two series of chrominance signals.
2. Description of the Prior Art
Such VTRs that record and reproduce a luminance signal and chrominance signal on separate tracks have so far been known.
An example of the recording system of such VTRs is shown in FIG. 1. As shown in the figure, a video signal output is recorded which constitutes a luminance signal Y and color difference signals R-Y, B-Y.
The luminance signal Y is emphasized for its high frequency portion by a pre-emphasis circuit 1, frequency-modulated into an FM luminance signal Y.sub.FM by an FM modulator 2, and supplied through an amplifier 3 to rotating magnetic heads H.sub.Y1, H.sub.Y2.
By such heads H.sub.Y1, H.sub.Y2, an oblique record track T.sub.Y for each field is formed on a magnetic tape 4 as shown in FIG. 2.
The color difference signals R-Y, B-Y are each compressed in half along the time base by a time base compressor 5 and arranged within one horizontal period in the order of R-Y and B-Y signals as shown in FIG. 3.
The time compressed color difference signal C is emphasized for its high frequency portion by a pre-emphasis circuit 6 and frequency-modulated by an FM modulator 7, and further, the FM color difference signal C.sub.FM is supplied through an amplifier 8 to rotating magnetic heads H.sub.C1, H.sub.C2. By these heads H.sub.C1, H.sub.C2, an oblique record track T.sub.C for each field is formed on the magnetic tape 4 as shown in FIG. 2.
Reference character P.sub.C in FIG. 3C indicates a horizontal synchronizing pulse.
While the luminance signal Y and color difference signals R-Y, B-Y recorded as shown in FIG. 2 are reproduced in the reproduction system in the sequence reverse to that in the recording system, since the color difference signals R-Y, B-Y have been compressed along the time base, their time base is expanded doubly in the reproduction system.
The time base compressor 5 in the recording system shown in FIG. 1 is constituted of four charge coupled devices (CCDs) having capacity for a horizontal period (1H). That is, two devices are used for the R-Y signal and two devices are used for the B-Y signals, and the R-Y signal and B-Y signal for 1H are each input to their respective first and second CCDs alternately at intervals of 1H and the compressed color difference signal C is produced with the signal for 1H output at a 1/2H interval from the output side.
In such a time base compressor 5, if the characteristics of the first and second CCDs used for each of the R-Y signal and the B-Y signal are not identical, there are produced differences in level at intervals of 1H in each of the R-Y signal and the B-Y signal obtained by time base expansion in the reproduction system. Therefore, there has been such a problem that noises inclusive of DC offset are mixed in the signals and changes in hue and lightness are observed in the output of the color demodulating circuit.
Therefore, in order to eliminate the noise including the DC offset component, a comb filter made up of a delay line 9 and an adder 10 as shown in FIG. 4 has so far been in use. The adder 10 is constructed of three resistors of identical resistance values connected in J configuration and adapted to output the mean value of input signals a and b, (a+b)/2.
As is well known, color difference signals have a line correlation. On the other hand, the noise such as DC offset produced at the time of recording due to the CCDs as described above has the frequency component of integer multiple of one-half the horizontal frequency f.sub.H, and hence, its phase is inverted each 1H period.
Therefore, when a noise-mixed input signal A as shown in FIG. 5A and the output signal B of the 1H delay line 9 as shown in FIG. 5B are averaged as ##EQU1## in the adder 10, the noise inclusive of the DC offset is canceled as shown in FIG. 5C.
However, in the interval where there is no correlation between the input signal A and the output signal B, the level of the output signal of the comb filter, as seen in the waveform C of FIG. 5 at Fr, is decreased to half by the averaging, and at Bk where no input signal A has been present, a chrominance signal at a half level appears.
As a result, there has been such a problem that color level reduction occurs in the reproduced image, specifically at the edges thereof, or color smearing is produced in the vertical direction on the screen.
To solve such problems, there is proposed a circuit as disclosed in Japanese Laid-open Patent Publication No. 61-156993.
A comb filter disclosed in the above publication will be described with reference to FIGS. 6 and 7.
While a chrominance signal supplied from an input terminal IN is applied commonly to a 1H delay line 9, first adder 10, and a subtractor 11, the output of the delay line 9 is applied commonly to the adder 10 and subtractor 11.
The subtractor 11 is adapted to output one-half the difference between two input signals a and b, ##EQU2##
Reference numeral 20 denotes an overall configuration of a clip type correlator made up of an amplifier 12, clipper 13, small-amplitude passing correlator 14, and two clamp circuits 15, 16.
An output signal D from the subtractor 11 having no line correlation is applied to one input terminal 11a of the clip type correlator 20 and supplied to one terminal of the small-amplitude passing correlator 14 through the amplifier 12, clipper 13, and the clamp circuits 15. To the other input terminal of the small-amplitude passing correlator 14, the output signal D is applied through the clamp circuit 16.
The output of the small-amplitude passing correlator 14 and the added output C of the first adder 10 are supplied to a second adder 18 and the added output K appears at the output terminal OUT.
Operations of the arrangement shown in FIG. 6 will be described referring to FIG. 7.
The chrominance signal A input to the input terminal IN (shown in FIG. 7A) is passed through the 1H delay line 9 to be delayed by 1H as shown in FIG. 7B. Therefore, the output C of the first adder 10 becomes as shown in FIG. 7C.
And, the signal obtained by subtracting the signal shown in FIG. 7B from the signal shown in FIG. 7A, as shown in FIG. 7D, is output from the subtractor 11 as the signal D.
The output D of the subtractor 11 amplified by the amplifier 12, and then, its low level portion is cut off by the clipper 13, whereby the signal E as shown in FIG. 7E is obtained.
Correlation between the signal shown in FIG. 7E and the signal shown in FIG. 7D is taken and portions of smaller amplitude are output by the small-amplitude passing correlator 14, and thereby, the signal as shown in FIG. 7J is obtained. The output signal J of the small-amplitude passing correlator 14 and the output C of the first adder 10 as shown in FIG. 7C are added by the second adder 18, whereby the chrominance signal as shown in FIG. 7K is obtained at the output terminal.
It is apparent from the signal shown in FIG. 7K, that a chrominance signal from which noise is eliminated so as not to cause color level reduction and color smearing can be provided by the arrangement of FIG. 6.
However, since analog processing is performed in the arrangement of FIG. 6 and such as glass or CCD is used as the 1H delay line therein, there is the problem that linearity, S/N, frequency characteristic, temperature characteristic, and the like are subject to variation.
An invention to solve such problem has already been proposed in Japanese patent application No. 61-81619.
The above mentioned invention will be described with reference to FIGS. 8 and 9.
In the arrangement as shown in FIG. 8, latch circuits 21, 22 are supplied with chrominance signals converted into digital signals in the reproduction system.
Referring to the figure, the data R-Y.sub.D from a delay circuit 26 is supplied to one input of a switching circuit 30R constituting a dropout compensation circuit 23. The output data R-Y.sub.D1 of the switching circuit 30R is supplied to a shift register 31R constituting a 1H delay line and the output data R-Y.sub.D2 of the shift register 31R is supplied to the other input of the switching circuit 30R.
And, while the output data R-Y.sub.D1 of the switching circuit 30R is supplied to a ROM 32R of a P-ROM, for example, as high-order bits of an address signal, the output data R-Y.sub.D2 of the shift register 31R is supplied to the ROM 32R as low-order bits of the address signal.
In the present case, at the address in the ROM 32R designated by the output data R-Y.sub.D1 and R-Y.sub.D2, there is stored the data EQU {(R-Y.sub.D1)+(R-Y.sub.D2)}/2=R-Y.sub.D12
when the output data R-Y.sub.D1 and R-Y.sub.D2 are judged to be correlative, and the data R-Y.sub.D1 is recorded when they are judged to be uncorrelative.
The output data of the ROM 32R is latched by a latch circuit 33R and supplied to a D/A converter 24.
The switching circuit 30R is supplied with a dropout pulse Dp from a dropout pulse generator, not shown, when there is a dropout in the chrominance signal. The shift register 31R and latch circuit 33R are supplied with a clock 1/2R.multidot.CK' from a reference clock.
With such an arrangement, when a dropout pulse D.sub.P is not applied to the switching circuit 30R, the current data R-Y.sub.D is output as the output data R-Y.sub.D1 of the switching circuit 30R, and when the dropout pulse D.sub.P is applied thereto, the data 1H before, R-Y.sub.D2, is output as the output data R-Y.sub.D1 of the switching circuit 30R, whereby a dropout is compensated.
From the ROM 32R is read out the data at the address designated by the output data R-Y.sub.D1 of the switching circuit 30R and the output data R-Y.sub.D2 of the shift register 31R. That is, when there is a correlation between the output data R-Y.sub.D1 and R-Y.sub.D2, the data EQU {(R-Y.sub.D1)+(R-Y.sub.D2)}/2=R-Y.sub.D12
is read out. This data is the arithmetical mean of the current data R-Y.sub.D1 and the data 1H before, R-Y.sub.D2.
And, when there is no correlation between the data R-Y.sub.D1 and the data R-Y.sub.D2, the data R-Y.sub.D1 is read out. This is the current data.
For example, when the output data R-Y.sub.D1 of the switching circuit 30R varies with time as shown in FIG. 9B (FIG. 9A shows its analog waveform) and the output data R-Y.sub.D2 of the shift register 31R varies with time as shown in FIG. 9D (FIG. 9C shows its analog waveform), the data from the ROM 32R varies with time for example as shown in FIG. 9F (FIG. 9E shows its analog waveform). In the present example, if the data R-Y.sub.D1 is [ 11111101] and the data R-Y.sub.D2 is [11111111], then they are judged to be correlated and the arithmetical mean value of both the data, [11111110], is output.
The channel for the data B-Y.sub.D in FIG. 8 is arranged similarly to the above described channel for the data R-Y.sub.D and operates in like manner.
Accordingly, with the arrangement of FIG. 8, the correlation is uniformly detected and the pertinent processing is digitally performed by the ROMs 32R, 32B. Therefore, the problem about linearity, S/N, frequency characteristic, temperature characteristic, or the like is resolved.
However, in such a processing circuit of video chrominance signals, whether or not there exists a correlation is judged according to the difference in level .vertline.a-b.vertline. and an arithmetical mean value is output when the difference in level is less than a predetermined value, and therefore, there arises a problem when the level of the chrominance signal is low.
That is, in the case where the chrominance signal is at a high level, even if a correlation is judged to exist between the current signal and the signal 1H (one horizontal period) before because the difference between their levels is less than a predetermined value, and as a result, the arithmetical mean value ##EQU3## for example, is output, there may arise no problem since the arithmetical mean value is not so much lowered by dubbing. But, if the arithmetical mean value is made to be output in like manner in the case where the chrominance signal is at a low level, the arithmetical mean value is considerably lowered each time dubbing is made, and thereby, such a problem is produced that color at boundary portions becomes lighter and resolution is lowered.
If, for example, signals at a level lower than 5% are judged to be correlated, lowering of the level is produced each time dubbing is repeated, as shown in the following table. As a result, there arises such
TABLE ______________________________________ No. of Times of Dubbing Line NO. 1 2 3 4 ______________________________________ n 0% 0% 0% 0% n + 1 0% 0% 0% 0% n + 2 5% 2.5% 1.25% 0.625% n + 3 5% 5% 3.75% 2.5% ______________________________________
a problem that noise is increased while the level is lowered and irregularity of color becomes conspicuous.